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[VHDL-FPGA-Verilog] UART

Description: 使用FPGA的FIFO，状态机，乒乓操作等实现了异步UART。-The use of FPGA-FIFO, state machine, ping-pong operation to achieve the asynchronous UART.
Platform: | Size: 1106944 | Author: xiao cao | Hits:

[VHDL-FPGA-Verilog] uartfifo

Description: 基于FPGA的串口发送源代码，通过FIFO能够发送一段字符串。-FPGA-based serial port source code, a string can be sent through the FIFO.
Platform: | Size: 840704 | Author: luoqv | Hits:

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